NetFPGA USB 2
The NetFPGA USB2.0 Interface board is intended to mount to the 40-pin debug connector of a NetFPGA 1G network board to provide 2 x USB2.0 Interface device ports which are configured to appear to USB 2.0 host devices (such as SoCs) as a USB-attached Network Interface using the USB Communications class Ethernet (on Linux, this is mostly supported by the usbnet driver shim).
- NetFPGA USB 2 v0.1 is based on the Cypress CY7C68003 and works at the ULPI level
- NetFPGA USB 2 v0.2 is based on the Cypress CY7C68013 EZ-USB2 (FX2LP) device and works at the FIFO level.
- NetFPGA USB 2 v0.3 is also based on the Cypress CY7C68013 EZ-USB2, but also includes the all important level translators... and uses 16-bit transfers
The CY7C68013 was initially considered, but dispelled due to a misunderstanding of the role of the 8051 core in the device. The CY7C68003 would allow a much faster (60MBps) throughput, but at the cost of significantly more complex USB2.0 logic in the FPGA. The complexity of the FPGA code has led to a re-evaluation and the choosing of the CY7C68013 device instead, and hence the v0.2 board.
There is no provision for power supply on the Debug connector of the NetFPGA 1G (there are 6 pins for GND). Therefore a flying lead is added to the NetFPGA to pick up +2.5V and +3.3V supplies for the NetFPGA USB 2 interface board.