Nf2 top
From Bobs Projects
nf2_top is the "top" Verilog module in the NetFPGA Reference Design framework. The source for this module is located at: $NF_ROOT/lib/verilog/core/nf2/generic_top/src/nf2_top.v
nf2_top connects to all the pads and is responsible for conditioning all the signals before they are passed on the nf2_core for standard Verilog processing.
To deal with the Dual-Data-Rate (DDR) signals to the Ethernet PHYs, nf2_top also instantiates 4 instances of rgmii_io, one for each PHY.
