Nf2 usb2 int

nf2_usb2_int is a Verilog module to implement the NetFPGA USB 2 v0.3 interface to the NetFPGA 1G board. The code is located in $NF_DESIGN_DIR/src/nf2_usb2_int.v

nf2_usb2_int is responsible for actually driving the NetFPGA USB 2 v0.3 interface, including:

• generating the IFCLK signal
• arbitrating between IN and OUT transfers on the bi-directional 16-bit data bus
• arbitrating between the two Cypress CY7C68013 FX2 EZ-USB devices
• driving all chip-select, read, write, output-enable etc. lines and monitoring all FIFO statuses
• providing separate 16-bit data channels to/from the NetFPGA Reference Design packet queues

nf2_usb2_int makes use of no other Verilog modules.

nf2_usb2_int is instantiated by the nf2_usb2 module.

Internals

nf2_usb2_int provides a number of Finite-State-Machines (FSMs) to perform it's tasks:

• clk_gen divides the NetFPGA 1G 125MHz core clk by 3 or 4 to give either a 41.667MHz or 31.25MHz IFCLK
• sel_chan arbitrates between the four data channels (one IN and one OUT for each of the two EZ-USB devices)